1. Technical Field
The present invention relates generally to chip production, and more particularly to a nanostructured chip and a method of producing the nanostructured chip.
2. Description of Related Art
In a conventional manufacturing process of a wafer, an epitaxial layer is formed on a surface of a substrate in advance, and is then processed to form particular structures or circuits.
However, if the material of the substrate is different from that of the epitaxial layer (e.g., a silicon substrate with a gallium nitride (GaN) epitaxial layer formed thereon), a stress tends to be generated in the wafer during a cooling process due to the different thermal expansion coefficients between the substrate and the epitaxial layer. Consequently, the epitaxial layer might have cracks or bowings because the silicon substrate is too brittle to eliminate the stress, which may lead to a low yield in the subsequent processing procedures and even wafer fragmentation. Additionally, if the lattice constants of the substrate and the epitaxial layer are mismatched, a stress could be also generated in the wafer, which may cause cracks or bowings in the epitaxial layer or wafer fragmentation as well.